PIC12F635/PIC16F636/639
TABLE 4-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Add
r
Name
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on: Value on
POR, BOD, all other
WUR
Resets
05h PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0 --xx xx00 --uu uu00
0Bh/ INTCON
8Bh
GIE PEIE T0IE
INTE
RAIE
T0IF
INTF RAIF 0000 0000 0000 0000
0Eh TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
0Fh TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
10h T1CON
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu
1Ah CMCON1
—
—
—
—
—
—
T1GSS C2SYNC ---- --10 ---- --10
19h CMCON0
C2OUT C1OUT C2INV C1INV
CIS
CM2
CM1
CM0 0000 0000 0000 0000
81h OPTION_REG RAPU INTEDG T0CS T0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
85h TRISA
—
— TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
95h WPUDA
—
— WPUDA5 WPUDA4 — WPUDA2 WPUDA1 WPUDA0 --11 -111 --11 -111
96h IOCA
—
—
IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0 --00 0000 --00 0000
97h WDA
—
—
WDA5 WDA4
—
WDA2 WDA1 WDA0 --11 -111 --11 -111
Legend: x = unknown, u = unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
DS41232B-page 48
Preliminary
© 2005 Microchip Technology Inc.