SPAKMC331MFC20 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

SPAKMC331MFC20

highly-integrated 32-bit microcontroller, 16MHz

Motorola => Freescale 

During a low-power stop, unless the system clock signal is supplied by an external

source and that source is removed, the SIM clock control logic and the SIM clock sig-

nal (SIMCLK) continue to operate. The periodic interrupt timer and input logic for the

RESET and IRQ pins are clocked by SIMCLK. The SIM can also continue to generate

the CLKOUT signal while in low-power mode.

The stop mode system integration module clock (STSIM) and stop mode external

clock (STEXT) bits in SYNCR determine clock operation during low-power stop. Table

4-9 is a summary of the effects of STSIM and STEXT. MODCLK value is the logic level

on the MODCLK pin during the last reset before LPSTOP execution. Any clock in the

off state is held low. If the synthesizer VCO is turned off during LPSTOP, there is a

PLL relock delay after the VCO is turned back on.

4

Mode

LPSTOP

No

Yes

Yes

Yes

Yes

No

Yes

Yes

Yes

Yes

Table 4-9 Clock Control

Pins

MODCLK

EXTAL

0

External

Clock

0

External

Clock

0

External

Clock

0

External

Clock

0

External

Clock

1

Crystal or

Reference

1

Crystal or

Reference

1

Crystal or

Reference

1

Crystal or

Reference

1

Crystal or

Reference

SYNCR Bits

STSIM STEXT

X

X

0

0

0

1

1

0

1

1

X

X

0

0

0

1

1

0

1

1

SIMCLK

External

Clock

External

Clock

External

Clock

External

Clock

External

Clock

VCO

Clock Status

CLKOUT

External

Clock

Off

External

Clock

Off

External

Clock

VCO

Crystal or

Reference

Crystal or

Reference

VCO

Off

Crystal/

Reference

Off

VCO

VCO

ECLK

External

Clock

Off

External

Clock

Off

External

Clock

VCO

Off

Off

Off

VCO

4.3.5 Loss of Reference Signal

The state of the reset enable (RSTEN) bit in SYNCR determines what happens when

clock logic detects a reference failure.

When RSTEN is cleared (default state out of reset), the clock synthesizer is forced

into an operating condition referred to as limp mode. Limp mode frequency varies

from device to device, but maximum limp frequency does not exceed one half max-

imum system clock when X = 0, or maximum system clock frequency when X = 1.

When RSTEN is set, the SIM resets the MCU.

The limp status bit (SLIMP) in SYNCR indicates whether the synthesizer has a refer-

ence signal. It is set when a reference failure is detected.

MOTOROLA

4-16

SYSTEM INTEGRATION MODULE

MC68331

USER’S MANUAL

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