MC9S08SH8CSC View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MC9S08SH8CSC

HCS08 Microcontrollers

Freescale Semiconductor 

Appendix A Electrical Characteristics

A.9 Internal Clock Source (ICS) Characteristics

Table A-9. ICS Frequency Specification (Temperature Range = –40 to 125°C Ambient)

Nu

m

C

Rating

Symbol

Min

Typical

Max

Unit

Internal reference frequency - factory trimmed

1 P at VDD = 5 V and temperature = 25°C

2 P Internal reference frequency - untrimmed1

3 P Internal reference frequency - user trimmed

4 D Internal reference startup time

5

—

DCO output frequency range - untrimmed1

value provided for reference: fdco_ut = 1024 × fint_ut

6 D DCO output frequency range - trimmed

7

D

Resolution of trimmed DCO output frequency at fixed

voltage and temperature (using FTRIM)

8

D

Resolution of trimmed DCO output frequency at fixed

voltage and temperature (not using FTRIM)

9

D

Total deviation from actual trimmed DCO output

frequency over voltage and temperature

10

D

Total deviation of trimmed DCO output frequency over

fixed voltage and temperature range of 0°C to 70 °C

fint_ft

fint_ut

fint_t

tirefst

fdco_ut

fdco_t

Δfdco_res_t

Δfdco_res_t

Δfdco_t

Δfdco_t

—

25

31.25

—

25.6

32

—

—

—

—

31.25

36

—

55

36.86

—

± 0.1

± 0.2

+ 0.5

– 1.0

± 0.5

—

41.66

39.0625

100

42.66

40

± 0.2

± 0.4

±2

±1

kHz

kHz

kHz

μs

MHz

MHz

%fdco

%fdco

%fdco

%fdco

11 D FLL acquisition time 2

tacquire

1

ms

12 D DCO output clock long term jitter (over 2mS interval) 3

CJitter

—

0.02

0.2

%fdco

1 TRIM register at default value (0x80) and FTRIM control bit at default value (0x0).

2 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing

from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,

this specification assumes it is already running.

3 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBUS.

Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise

injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a

given interval.

MC9S08SH8 MCU Series Data Sheet, Rev. 3

Freescale Semiconductor

303

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