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AD8260ACPZ-RL(Rev0) View Datasheet(PDF) - Analog Devices

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AD8260ACPZ-RL Datasheet PDF : 32 Pages
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CONNECTING THE EVALUATION BOARD
Figure 69 shows an evaluation board with typical test connec-
tions. The various pieces of test equipment are representative,
and equivalent equipment may be substituted.
The AD8260 includes two amplifier channels: a high current
driver and a digitally controlled VGA that is independently
enabled. The slide switch labeled ENABLE functions as the chip
enable, the GNSx switches permit the preamplifier/VGA to
operate, and the TX_EN switch enables the high current driver.
These independent enable functions permit the device to
operate in a send or listen mode when used as a transceiver.
The high current driver features differential inputs and is
optimally driven by a differential signal source. The input signal
is monitored at the 2-pin header labeled INP, using a differential
probe such as the Tektronix P6247 (not shown). Two 49.9 Ω
resistors are provided (R12 and R13), either for terminating
coaxial cables from a signal generator or to be used as load
resistors for a DAC with a current source output. An optional
external load resistor is connected at the SMA connector TXOP
and the output signal monitored at the 2-pin header labeled
TXOP_1.
As shipped, the gain of the high current driver is 1.5×, its default
value. The internal differential network with resistor values of
1 kΩ and 1.5 kΩ establishes this value. Other values of gain are
realized by connecting external resistors to the device at Pin 23,
Pin 24, Pin 27, Pin 28, and Pin 31, as shown in Figure 68, which
shows the internal structure for the default gain and how the
gain can be modified.
AD8260
DEFAULT GAIN SETTING
COMPONENTS ARE SHOWN IN BLACK,
OPTIONAL COMPONENTS
ARE SHOWN IN GRAY.
VOCM 32
VMDO
1
1.5k
INPP 31
INRP 30
1k
+
INRN
1k
29
INPN
28
1.5k
TXOP
24
TXOP
23
27 TXFB
CCOMP
Figure 68. Gain-Setting Resistors of the High Current Driver
The VGA/preamplifier is completely independent of the high
current driver and features a single-ended input at the SMA
connector PRAI. The input signal is monitored at the header
VPRE_IN. The output is monitored at the 2-pin header
VGA_OUT.
The gain bits, GNS0 through GNS3, must be set before the
VGA/preamplifier can operate. Table 4 lists the binary gain
codes. The board is shipped with both enables (ENBL and
TXEN) engaged and the gain-code switches adjusted for
maximum DGA gain (1011). Resistor R5 and Resistor R6
establish the preamplifier gain and are 100 Ω as shipped for a
noninverting preamplifier gain of 2×.
Rev. 0 | Page 27 of 32

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