PSD834F3A-12UI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD834F3A-12UI Datasheet PDF : 128 Pages
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PSD8XXFX
Figure 43. Input macrocell timing (product term clock)
tINH
tINL
PT CLOCK
tIS
tIH
INPUT
AC/DC parameters
OUTPUT
AI03101
tINO
Table 54. Input macrocell timing (5 V devices)
Symbol
Parameter
Conditions
-70
-90
-15
Min Max Min Max Min Max
PT
Aloc
Turbo
off
Unit
tIS
Input setup time
tIH
Input hold time
tINH
NIB input high time
tINL
NIB input low time
tINO
NIB input to combinatorial
delay
(1)
0
0
0
(1)
15
20
26
(1)
9
12
18
(1)
9
12
18
ns
+ 10 ns
ns
ns
(1)
34
46
59 + 2 + 10 ns
1. Inputs from port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch timings refer to tAVLX and tLXAX.
Table 55. input macrocell timing (3 V devices)
Symbol
Parameter
Conditions
-12
-15
-20
Min Max Min Max Min Max
PT
Aloc
Turbo
off
Unit
tIS
Input setup time
tIH
Input hold time
tINH
NIB input high time
tINL
NIB input low time
tINO
NIB input to combinatorial
delay
(1)
0
0
0
(1)
25
25
30
(1)
12
13
15
(1)
12
13
15
ns
+ 20 ns
ns
ns
(1)
46
62
70 + 4 + 20 ns
1. Inputs from port A, B, and C relative to register/ latch clock from the PLD. ALE latch timings refer to tAVLX and tLXAX.
Doc ID 7833 Rev 7
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