SI3019-F-FM View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

SI3019-F-FM

PROGRAMMABLE VOICE DAA SOLUTIONS

Silicon Laboratories 

Si3050 + Si3011/18/19

By setting the correct starting point of the data, the Si3050 can operate with buses having multiple devices

requiring different time slots. The DTX pin is high impedance except during transmission of an 8-bit PCM sample.

DTX returns to high impedance either on the negative edge of PCLK during the LSB or on the positive edge of

PCLK following the LSB. This behavior is based on the setting of the TRI bit in the PCM Mode Select register.

Tristating on the negative edge allows the transmission of data by multiple sources in adjacent timeslots without the

risk of driver contention. In addition to 8-bit data modes, a 16-bit linear mode is also provided. This mode can be

activated via the PCMF bits in the PCM Mode Select register. Double-clocked timing also is supported in which the

duration of a data bit is two PCLK cycles. This mode is activated via the PHCF bit in the PCM Mode Select register.

Setting the TXS or RXS registers greater than the number of PCLK cycles in a sample period stops data

transmission or reception. Figures 30–33 illustrate the usage of the PCM highway interface to adapt to common

PCM standards.

PCLK

FSYNC

PCLK_CNT

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

DRX

MSB

LSB

DTX

HI-Z

MSB

HI-Z

LSB

Figure 30. PCM Highway Transmission, Short FSYNC, Single Clock Cycle Delayed Transmission

(TXS = RXS = 0, PHCF = 0, TRI = 1)

Rev. 1.5

41

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