M48T128VPM(2010) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48T128VPM Datasheet PDF : 23 Pages
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Operation modes
M48T128Y, M48T128V
2.1
READ mode
The M48T128Y/V is in the READ mode whenever W (WRITE enable) is high and E (chip
enable) is low. The unique address specified by the 17 address inputs defines which one of
the 131,072 bytes of data is to be accessed.
Valid data will be available at the data I/O pins within tAVQV (address access time) after the
last address input signal is stable, providing the E and G access times are also satisfied. If
the E and G access times are not met, valid data will be available after the latter of the chip
enable access times (tELQV) or output enable access time (tGLQV). The state of the eight
three-state data I/O signals is controlled by E and G. If the outputs are activated before
tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If the address inputs
are changed while E and G remain active, output data will remain valid for tAXQX (output
data hold time) but will go indeterminate until the next address access.
Figure 4. READ mode AC waveforms
A0-A16
E
tAVQV
tELQV
tAVAV
VALID
G
DQ0-DQ7
tELQX
tGLQV
tGLQX
tAXQX
tEHQZ
tGHQZ
DATA OUT
AI01197
Note:
WE = High.
Table 3. READ mode AC characteristics
Symbol
Parameter(1)
M48T128Y
–70
M48T128V
–85
Min Max Min Max
tAVAV
READ cycle time
70
85
tAVQV Address valid to output valid
70
85
tELQV Chip enable low to output valid
70
85
tGLQV
tELQX(2)
tGLQX(2)
tEHQZ(2)
tGHQZ(2)
Output enable low to output valid
Chip enable low to output transition
Output enable low to output transition
Chip enable high to output Hi-Z
Output enable high to output Hi-Z
40
55
5
5
5
5
25
30
25
30
tAXQX Address transition to output transition
10
5
1. Valid for ambient operating temperature: TA = 0 to 70 °C; VCC = 4.5 to 5.5 V or 3.0 to 3.6 V (except where noted).
2. CL = 5 pF.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
8/23
Doc ID 5746 Rev 6
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