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STM32F217REH6V View Datasheet(PDF) - STMicroelectronics

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STM32F217REH6V Datasheet PDF : 173 Pages
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STM32F21xxx
Electrical characteristics
5.3.21 DAC electrical characteristics
Table 65. DAC characteristics
Symbol
Parameter
Min Typ
Max
Unit
Comments
VDDA
VREF+
VSSA
RLOAD(1)
Analog supply voltage
1.8
Reference supply voltage
1.8
Ground
0
Resistive load with buffer ON 5
RO(1)
Impedance output with buffer
OFF
-
CLOAD(1) Capacitive load
-
DAC_OUT Lower DAC_OUT voltage
min(1)
with buffer ON
0.2
DAC_OUT Higher DAC_OUT voltage
max(1)
with buffer ON
-
DAC_OUT Lower DAC_OUT voltage
min(1)
with buffer OFF
-
DAC_OUT Higher DAC_OUT voltage
max(1)
with buffer OFF
-
-
IVREF+(3)
DAC DC VREF current
consumption in quiescent
mode (Standby mode)
-
-
DAC DC VDDA current
IDDA(3)
consumption in quiescent
mode(2)
-
-
3.6
V
-
3.6
V VREF+ VDDA
-
0
V
-
-
kΩ
When the buffer is OFF, the
-
15
kΩ
Minimum resistive load between
DAC_OUT and VSS to have a 1%
accuracy is 1.5 MΩ
Maximum capacitive load at
-
50
pF DAC_OUT pin (when the buffer is
ON).
It gives the maximum output
-
-
V excursion of the DAC.
It corresponds to 12-bit input code
(0x0E0) to (0xF1C) at VREF+ =
-
VDDA – 0.2
V 3.6 V and (0x1C7) to (0xE38) at
VREF+ = 1.8 V
0.5
-
mV
It gives the maximum output
excursion of the DAC.
- VREF+ – 1LSB V
With no load, worst code (0x800)
170
240
at VREF+ = 3.6 V in terms of DC
consumption on the inputs
µA
With no load, worst code (0xF1C)
50
75
at VREF+ = 3.6 V in terms of DC
consumption on the inputs
280
380
µA
With no load, middle code (0x800)
on the inputs
With no load, worst code (0xF1C)
475
625
µA at VREF+ = 3.6 V in terms of DC
consumption on the inputs
DNL(3)
Differential non linearity
Difference between two
consecutive code-1LSB)
-
-
-
-
±0.5
LSB
Given for the DAC in 10-bit
configuration.
±2
LSB
Given for the DAC in 12-bit
configuration.
Doc ID 17050 Rev 8
119/173

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