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STM32F217RGT7 View Datasheet(PDF) - STMicroelectronics

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STM32F217RGT7 Datasheet PDF : 173 Pages
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Electrical characteristics
STM32F21xxx
5.3.11
PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences (see Table 39: EMI characteristics). It is available only on the main PLL.
Table 33. SSCG parameters constraint
Symbol
Parameter
fMod
md
MODEPER * INCSTEP
Modulation frequency
Peak modulation depth
1. Guaranteed by design, not tested in production.
Min
-
0.25
-
Typ Max(1) Unit
-
10
KHz
-
2
%
-
2151
-
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
MODEPER = round[fPLL_IN ⁄ (4 × fMod)]
fPLL_IN and fMod must be expressed in Hz.
As an example:
If fPLL_IN = 1 MHz and fMOD = 1 kHz, the modulation depth (MODEPER) is given by equation
1:
MODEPER = round[106 ⁄ (4 × 103)] = 250
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
INCSTEP = round[((215 1) × md × PLLN) ⁄ (100 × 5 × MODEPER)]
fVCO_OUT must be expressed in MHz.
With a modulation depth (md) = ±2 % (4 % peak to peak), and PLLN = 240 (in MHz):
INCSTEP = round[((215 1) × 2 × 240) ⁄ (100 × 5 × 250)] = 126md(quantitazed)%
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
mdquantized% = (MODEPER × INCSTEP × 100 × 5) ⁄ ((215 1) × PLLN)
As a result:
mdquantized% = (250 × 126 × 100 × 5) ⁄ ((215 1) × 240) = 2.0002%(peak)
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Doc ID 17050 Rev 8

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