ST7PLITE35F2M6TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7PLITE35F2M6TR
STMicroelectronics
ST7PLITE35F2M6TR Datasheet PDF : 173 Pages
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ST7LITE3xF2
DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d)
AUTORELOAD REGISTER (ATR1H)
Read / Write
Reset Value: 0000 0000 (00h)
15
8
0
0
0
0 ATR11 ATR10 ATR9 ATR8
AUTORELOAD REGISTER (ATR1L)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
ATR7 ATR6 ATR5 ATR4 ATR3 ATR2 ATR1 ATR0
Bits 11:0 = ATR1[11:0] Autoreload Register 1.
This is a 12-bit register which is written by soft-
ware. The ATR1 register value is automatically
loaded into the upcounter CNTR1 when an over-
flow occurs. The register value is used to set the
PWM frequency.
PWM OUTPUT CONTROL REGISTER
(PWMCR)
Read/Write
Reset Value: 0000 0000 (00h)
7
0
0
OE3
0
OE2
0
OE1
0
OE0
PWMx CONTROL STATUS REGISTER
(PWMxCSR)
Read / Write
Reset Value: 0000 0000 (00h)
7
6
0
0
0
0
0
0
0 OPx CMPFx
Bits 7:2= Reserved, must be kept cleared.
Bit 1 = OPx PWMx Output Polarity.
This bit is read/write by software and cleared by
hardware after a reset. This bit selects the polarity
of the PWM signal.
0: The PWM signal is not inverted.
1: The PWM signal is inverted.
Bit 0 = CMPFx PWMx Compare Flag.
This bit is set by hardware and cleared by software
by reading the PWMxCSR register. It indicates
that the upcounter value matches the Active DCRx
register value.
0: Upcounter value does not match DCRx value.
1: Upcounter value matches DCRx value.
BREAK CONTROL REGISTER (BREAKCR)
Read/Write
Reset Value: 0000 0000 (00h)
7
0
Bits 7:0 = OE[3:0] PWMx output enable.
These bits are set and cleared by software and
cleared by hardware after a reset.
0: PWM mode disabled. PWMx Output Alternate
Function disabled (I/O pin free for general pur-
pose I/O)
1: PWM mode enabled
0
0
BA BPEN PWM3 PWM2 PWM1 PWM0
Bits 7:6 = Reserved. Forced by hardware to 0.
Bit 5 = BA Break Active.
This bit is read/write by software, cleared by hard-
ware after reset and set by hardware when the
BREAK pin is low. It activates/deactivates the
Break function.
0: Break not active
1: Break active
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