Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet
10
63
11
79
12
86
13
136
14
123
X
Section 3.5.4: Change Wait command description to express wait cycles in
terms of SPI clock, not CPU clock.
X
Table 29: Corrected register addresses for PORT_VLAN_IP1/2 and
PORT_VLAN_IM1/2.
X
Table 41: Frame Timer default changed to 0x0
X
Table 158: Inclued recommendations for setting value of PAUSE resend
interval
X
Group 7 Counters: Modify Unicast, Multicast and Broadcast to include
possible bad FCS frames.
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165