STP7N65M2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STP7N65M2

N-channel 650 V, 0.98 Ω typ., 5 A MDmesh™ M2 Power MOSFETs in TO-220 and IPAK packages

STMicroelectronics 

Electrical characteristics

STP7N65M2, STU7N65M2

2

Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 5: On /off states

Symbol

Parameter

Test conditions

V(BR)DSS

Drain-source breakdown

voltage

VGS = 0, ID = 1 mA

Zero gate voltage

IDSS

drain current

Gate-body leakage

IGSS

current

VGS = 0, VDS = 650 V

VGS = 0, VDS = 650 V,

TC=125 °C

VDS = 0, VGS = ± 25 V

VGS(th)

RDS(on)

Gate threshold voltage

Static drain-source

on-resistance

VDS = VGS, ID = 250 µA

VGS = 10 V, ID = 2.5 A

Min. Typ. Max. Unit

650

V

1 µA

100 µA

±10 µA

2

3

4

V

0.98 1.15 Ω

Symbol

Parameter

Ciss

Coss

Crss

Input capacitance

Output capacitance

Reverse transfer

capacitance

C

(1)

oss eq.

RG

Qg

Qgs

Equivalent output

capacitance

Intrinsic gate resistance

Total gate charge

Gate-source charge

Qgd Gate-drain charge

Table 6: Dynamic

Test conditions

VDS = 100 V, f = 1 MHz,

VGS = 0

VDS = 0 to 520 V, VGS = 0

f = 1 MHz open drain

VDD = 520 V, ID = 5 A,

VGS = 10 V

(see Figure 17: "Gate charge

test circuit")

Min. Typ. Max. Unit

-

270 -

- 14.5 -

pF

- 0.8 -

- 108 - pF

-

7

-

Ω

-

9

- nC

- 2.3 - nC

- 4.3 - nC

Notes:

(1)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS

Symbol Parameter

td(on)

Turn-on

delay time

tr

Rise time

td(off)

Turn-off

delay time

tf

Fall time

Table 7: Switching times

Test conditions

VDD = 325 V, ID = 2.5 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 16: "Switching times test circuit

for resistive load"and Figure 21: "Switching

time waveform" )

Min. Typ. Max. Unit

-

8

-

ns

-

20

-

ns

-

30

-

ns

-

20

-

ns

4/18

DocID026788 Rev 3

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