AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT91SAM9G46B-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Table 53-1. SAM9G46 Datasheet Rev. 11028G Revision History (Continued)

Date Changes

Section 21. “DDR SDR SDRAM Controller (DDRSDRC)” (cont’d)

Table 21-8 “Register Mapping”:

- three registers “DDRSDRC Timingx” renamed to “DDRSDRC Timing Parameter x”

- four registers “DDRSDRC Delay I/O” moved from offset range 0x34–0x40 to 0x40–0x4C

- offset range 0x50–0xE0 defined as reserved

Added addresses to register description sections

Section 21.8.3 “DDRSDRC Configuration Register”:

- updated note in DLL bit description (“found only in DDR1-SDRAM” changed to “found only in DDR2-SDRAM”)

- added note “This field is found only in DDR2-SDRAM devices” to DIS_DLL bit description

- added note “This field is found only in DDR2-SDRAM devices” to OCD bit description

- updated EBISHARE bit description

- “Low-power DDR-SDRAM” changed to “Low-power DDR1-SDRAM” in ACTBST bit description

Section 21.8.4 “DDRSDRC Timing Parameter 0 Register”: updated TWTR field description

Section 21.8.5 “DDRSDRC Timing Parameter 1 Register”: updated descriptions of fields TXSNR, TXSRD, and TXP

Section 21.8.7 “DDRSDRC Low-power Register”: updated TIMEOUT field description

Section 21.8.10 “DDRSDRC High Speed Register”: updated DIS_ANTICIP_READ bit description

Section 21.8.11 “DDRSDRC DELAY I/O Register”: updated DELAYx field description

Section 22. “Error Correction Code Controller (ECC)”

08-Dec-15 Table 22-1 “Register Mapping”: removed reset value from ECC_CR (register is write-only)

Section 23. “Peripheral DMA Controller (PDC)”

Table 23-2 “Register Mapping”: removed reset value from PERIPH_PTCR (register is write-only)

Section 25. “Power Management Controller (PMC)”

Table 25-2 “Register Mapping”:

- “UTMI Clock Register” corrected to “UTMI Clock Configuration Register”

- access for PMC_PLLICPR changed from “Write-only” to “Read/Write”

Section 25.12.18 “PLL Charge Pump Current Register”: access changed from “Write-only” to “Read/Write”

Section 26. “Advanced Interrupt Controller (AIC)”

Removed reset value from register description sections (reset values provided in Table 26-3 “Register Mapping”)

Section 28. “Serial Peripheral Interface (SPI)”

Section 28.7.4 “SPI Slave Mode”: at end of section, deleted sentence referencing Underrun Error Status Flag (UNDES)

Section 28.8.5 “SPI Status Register”: removed UNDES bit

Section 28.8.6 “SPI Interrupt Enable Register”: removed UNDES bit

Section 28.8.7 “SPI Interrupt Disable Register”: removed UNDES bit

Section 28.8.8 “SPI Interrupt Mask Register”: removed UNDES bit

Section 30. “Two-wire Interface (TWI)”

Table 30-6 “Register Mapping”: removed reset value from TWI_THR (register is write-only)

Removed reset value from register description sections (reset values provided in Table 30-6 “Register Mapping”)

SAM9G46 Series [DATASHEET]

Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15

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