AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation
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AT91SAM9G46B-CU Datasheet PDF : 1277 Pages
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Table 53-1. SAM9G46 Datasheet Rev. 11028G Revision History (Continued)
Date Changes
Section 39. “Touchscreen ADC Controller (TSADCC)”
Updated Section 39.2 “Embedded Characteristics”
Figure 39-1 “TSADCC Block Diagram”: “ADTRG” corrected to “TSADTRG”; “ADVREF” corrected to “TSADVREF”
Table 39-4 “Register Mapping”: offset range 0x64–0xE0 defined as reserved; reset value 0x0000_0000 added to
TSADCC_MSCR and TSADCC_WPMR
Section 39.11.18 “TSADCC Write Protection Mode Register”: updated WPEN bit description; added KEY field description
Section 40. “DMA Controller (DMAC)”
Inserted heading Section 40.3 “DMA Controller Peripheral Connections” and updated text
Removed reset value from register description sections (reset values provided in Table 40-3 “Register Mapping”)
Section 43. “True Random Number Generator (TRNG)”
Removed reset value from Section 43.2.4 “TRNG Interrupt Mask Register”, Section 43.2.5 “TRNG Interrupt Status
Register”, and Section 43.2.6 “TRNG Output Data Register” (reset values provided in Table 43-1 “Register Mapping”)
Section 45. “Triple Data Encryption Standard (TDES)”
Section 45.3.3 “Last Output Data Mode”: deleted sentence “No more Output Data Register reads are necessary between
consecutive encryptions/decryptions (see “Last Output Data Mode” on page 1128).”
Section 47. “LCD Controller (LCDC)”
Table 47-15 “Register Mapping”: removed reset value from write-only registers
Removed reset value from register description sections (reset values provided in Table 47-15 “Register Mapping”)
Section 48. “Electrical Characteristics”
Table 48-4 “Power Consumption by Peripheral in Active Mode”: added peripherals AES and SHA
Table 48-5 “Processor Clock Waveform Parameters”: added missing footnote
08-Dec-15 Table 48-22 “External Voltage Reference Input”: “ADVREF” corrected to “TSADVREF”
Section 48.12 “Core Power Supply POR Characteristics”: transferred sections 48.12.1 “Power Sequence Requirements”
and 48.12.2 “Power-Up Sequence” to Section 4.2 “Power Sequence Requirements”
Section 48.15.1.1 “Maximum SPI Frequency”: updated content under “Master Read Mode”
Section 48.15.1.3 “Timing Extraction”: added content relative to MISO and MOSI sampling; inserted Figure 48-6 “MISO
Capture in Master Mode”
Table 48-34 “SPI Timings with 3.3V Peripheral Supply”: added “SPI Clock” parameter
Table 48-37 “SSC Timings with 3.3V Peripheral Supply”: updated characteristics for SSC4 and SSC7; deleted footnote
“Timings SSC4 and SSC7 depend on the...”
Table 48-38 “SSC Timings with 1.8V Peripheral Supply”: updated characteristics for SSC4 and SSC7; deleted footnote
“Timings SSC4 and SSC7 depend on the...”
Section 48.15.5.2 “Timing Constraints”: updated first sentence
Table 48-45 “RMII Mode”: below table, deleted irrelavent note “See Note (2) of Table 48-42.”
Section 48.15.6 “USART in SPI Mode”: instances of “UART” corrected to “USART”
Table 48-48 “USART SPI Timings with 1.8V Peripheral Supply”: added footnote relating to SPCK access times
Section 49. “Mechanical Characteristics”
Figure 49-1 “324-ball TFBGA Package Drawing”: dimension ‘E’ minimum value 0.5866 inches corrected to 0.5886 inches
Replaced Table 49-1. “Soldering Information” with Table 49-1 “Package Information”
Section 51. “Ordering Information”
Table 51-1 “AT91SAM9G46 Ordering Information”: replaced “Package Type” column with “Carrier Type” column
Section 52. “Errata”
Deleted sections 52.1.9 USB High Speed Host Port (UHPHS) / 52.1.9.1 “UHPHS: Packet Loss Issue in the UTMI
Transceivers”
SAM9G46 Series [DATASHEET]
Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15
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