AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation
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AT91SAM9G46B-CU Datasheet PDF : 1277 Pages
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8.5 CP15 Coprocessor
Coprocessor 15, or System Control Coprocessor CP15, is used to configure and control all the items in the list
below:
ARM9EJ-S
Caches (ICache, DCache and write buffer)
TCM
MMU
Other system options
To control these features, CP15 provides 16 additional registers. See Table 8-5.
Table 8-5. CP15 Registers
Register
Name
Read/Write
0
ID Code(1)
Read/Unpredictable
0
Cache type(1)
Read/Unpredictable
0
TCM status(1)
Read/Unpredictable
1
Control
Read/write
2
Translation Table Base
Read/write
3
Domain Access Control
Read/write
4
Reserved
None
5
Data fault Status(1)
Read/write
5
Instruction fault status(1)
Read/write
6
Fault Address
Read/write
7
Cache Operations
Read/Write
8
TLB operations
9
cache lockdown(2)
Unpredictable/Write
Read/write
9
TCM region
Read/write
10
TLB lockdown
Read/write
11
Reserved
None
12
Reserved
13
FCSE PID(1)
13
Context ID(1)
None
Read/write
Read/Write
14
Reserved
None
15
Test configuration
Read/Write
Notes: 1. Register locations 0,5, and 13 each provide access to more than one register. The register accessed depends on
the value of the opcode_2 field.
2. Register location 9 provides access to more than one register. The register accessed depends on the value of the
CRm field.
44 SAM9G46 Series [DATASHEET]
Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15
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