STM8S007C8
Electrical characteristics
9.3.6 I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All
unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
Table 35. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level
voltage
-0.3
-
0.3 x VDD
V
VIH
Input high level
voltage
VDD = 5 V
0.7 x VDD
-
VDD + 0.3 V
V
Vhys Hysteresis(1)
-
700
-
mV
Rpu Pull-up resistor
VDD = 5 V, VIN = VSS
30
55
80
kï—
tR, tF
Rise and fall timeï€
(10% - 90%)
Fast I/Osï€
Load = 50 pF
Standard and high sink I/Osï€
Load = 50 pF
-
-
-
20(2)
ns
-
125(2)
ns
Input leakage
Ilkg current,ï€
VSS ï‚£ VIN ï‚£ï€ ï€ VDD
analog and digital
-
-
±1
µA
Ilkg ana
Analog input
leakage current
VSS ï‚£ï€ ï€ VIN ï‚£ï€ ï€ VDD
-
-
±250 (3)
nA
Ilkg(inj)
Leakage current in
adjacent I/O
Injection current ±4 mA
-
-
±1(3)
µA
1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
2. Data guaranteed by design, not tested in production.
3. Data based on characterization results, not tested in production.
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