STM8S007C8T6TR(2015) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8S007C8T6TR
(Rev.:2015)

Value line, 24 MHz STM8S 8-bit MCU, 64 Kbytes Flash, true data EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C

STMicroelectronics 

STM8S007C8

Electrical characteristics

Figure 30. Typical NRST pull-up resistance vs VDD @ 3 temperatures

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069

Figure 31. Typical NRST pull-up current vs VDD @ 3 temperatures









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DLF

The reset network shown in Figure 32 protects the device against parasitic resets. The user

must ensure that the level on the NRST pin can go below the VIL max. level specified in

Table 35. Otherwise the reset is not taken into account internally. For power consumption

sensitive applications, the capacity of the external reset capacitor can be reduced to limit

charge/discharge current. If the NRST signal is used to reset the external circuitry, care

must be taken of the charge/discharge time of the external capacitor to fulfill the external

device’s reset timing conditions. The minimum recommended capacity is 10 nF.

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