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STM8S007C8T6TR(2015) View Datasheet(PDF) - STMicroelectronics

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STM8S007C8T6TR Datasheet PDF : 92 Pages
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STM8S007C8
Electrical characteristics
9.3.10
10-bit ADC characteristics
Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise
specified.
Symbol
Table 42. ADC characteristics
Parameter
Conditions
Min Typ Max Unit
fADC ADC clock frequency
VDDA = 3 to 5.5 V
1
-
4
MHz
VDDA = 4.5 to 5.5 V
1
-
6
VDDA Analog supply
-
3
-
5.5
V
VREF+ Positive reference voltage
-
2.75(1) -
VDDA
V
VREF- Negative reference voltage
-
VSSA
-
0.5(1)
V
VAIN
CADC
CInotenrvnearlssioanmvpoleltaagnedrhaonlgde(2)
capacitor
-
VSSA
-
VDDA
V
-
-
3
-
pF
tS(2) Sampling time
tSTAB Wakeup time from standby
tCONV
Total conversion time (including
sampling time, 10-bit resolution)
fADC = 4 MHz
fADC = 6 MHz
-
fADC = 4 MHz
fADC = 6 MHz
-
0.75
0.5
-
7-
3.5
2.33
14
µs
µs
µs
µs
1/fADC
1. Data guaranteed by design, not tested in production..
2. During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged by the external
source. The internal resistance of the analog source must allow the capacitance to reach its final voltage
level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on
the conversion result. Values for the sample clock tS depend on programming.
DocID022171 Rev 5
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