Electrical characteristics
STM8S003K3 STM8S003F3
Symbol Parameter
Table 44: ADC characteristics
Conditions
Min Typ Max Unit
fADC ADC clock frequency
VDD =2.95 to 5.5 V
1
VDD =4.5 to 5.5 V
1
VAIN Conversion voltage range(1)
VSS
4
MHz
6
VDD V
CADC Internal sample and hold
capacitor
3
pF
tS (1) Minimum sampling time
fADC = 4 MHz
fADC = 6 MHz
0.75
μs
0.5
tSTAB Wake-up time from standby
7
μs
tCONV Minimum total conversion time fADC = 4 MHz
3.5
μs
(including sampling time,
10-bit resolution)
fADC = 6 MHz
2.33
μs
14
1/fADC
(1) During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged
by the external source. The internal resistance of the analog source must allow the
capacitance to reach its final voltage level within tS. After the end of the sample time tS,
changes of the analog input voltage have no effect on the conversion result. Values for the
sample clock tS depend on programming.
Symbol
Table 45: ADC accuracy with RAIN < 10 kΩ , VDD= 5 V
Parameter
Conditions
Typ Max(1) Unit
|ET|
Total unadjusted error(2)
fADC = 2 MHz
1.6
3.5
|EO|
Offset error(2)
fADC = 4 MHz
2.2
4
LSB
fADC = 6 MHz
2.4
4.5
fADC = 2 MHz
1.1
2.5
82/100
DocID018576 Rev 3