PIC16F1503-I/ST View Datasheet(PDF) - Microchip Technology
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Description
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PIC16F1503-I/ST Datasheet PDF : 352 Pages
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PIC16(L)F1503
REGISTER 7-6: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
U-0
R/W-0/0
R/W-0/0
U-0
R/W-0/0
R/W-0/0
U-0
—
C2IF
C1IF
—
BCL1IF
NCO1IF
—
bit 7
U-0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
C2IF: Comparator C2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
C1IF: Comparator C1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
BCL1IF: MSSP Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
NCO1IF: Numerically Controlled Oscillator Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Interrupt Enable bit, GIE of the INTCON
register. User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
2011-2015 Microchip Technology Inc.
DS40001607D-page 69
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