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PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

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PIC32MX230F128L-I/PF Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
13.0 TIMER2/3, TIMER4/5
Note:
This data sheet summarizes the features
of the PIC32MX1XX/2XX/5XX 64/100-pin
family of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS60001105) of the “PIC32 Family
Reference Manual”, which is available
from the Microchip web site
(www.microchip.com/PIC32).
This family of PIC32 devices features four synchronous
16-bit timers (default) that can operate as a free-
running interval timer for various timing applications
and counting external events. The following modes are
supported:
• Synchronous internal 16-bit timer
• Synchronous internal 16-bit gated timer
• Synchronous external 16-bit timer
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous internal 32-bit timer
• Synchronous internal 32-bit gated timer
• Synchronous external 32-bit timer
Note:
In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to
represent Timer2 through 5 in 16-bit
modes. In 32-bit modes, ‘x’ represents
Timer2 or 4; ‘y’ represents Timer3 or 5.
13.1 Additional Supported Features
• Selectable clock prescaler
• Timers operational during CPU idle
• Time base for Input Capture and Output Compare
modules (Timer2 and Timer3 only)
• ADC event trigger (Timer3 in 16-bit mode, Timer2/
3 in 32-bit mode)
• Fast bit manipulation using CLR, SET and INV
registers
FIGURE 13-1:
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
Data Bus<31:0>
<15:0>
Reset
TMRx
Sync
ADC Event
Trigger(1)
Comparator x 16
Equal
PRx
TxIF
0
Event Flag
1
TGATE
QD
Q
TxCK
Gate
Sync
PBCLK
Note 1: ADC event trigger is available on Timer3 only.
TGATE
TCS
ON
x1
Prescaler
1, 2, 4, 8, 16,
10
32, 64, 256
00
3
TCKPS
2014-2017 Microchip Technology Inc.
DS60001290E-page 163

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