PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F128L-I/PF

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

REGISTER 13-1: TxCON: TYPE B TIMER ‘x’ CONTROL REGISTER (‘x’ = 2 THROUGH 5)

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0

U-0

31:24

—

U-0

U-0

U-0

U-0

U-0

U-0

U-0

—

—

—

—

—

—

—

U-0

23:16

—

U-0

U-0

U-0

U-0

U-0

U-0

U-0

—

—

—

—

—

—

—

R/W-0

U-0

R/W-0

U-0

U-0

U-0

U-0

U-0

15:8

ON(1,3)

—

SIDL(4)

—

—

—

—

—

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

U-0

R/W-0

U-0

7:0

TGATE(3)

TCKPS<2:0>(3)

T32(2)

—

TCS(3)

—

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-16

bit 15

bit 14

bit 13

bit 12-8

bit 7

bit 6-4

Unimplemented: Read as ‘0’

ON: Timer On bit(1,3)

1 = Module is enabled

0 = Module is disabled

Unimplemented: Read as ‘0’

SIDL: Stop in Idle Mode bit(4)

1 = Discontinue operation when device enters Idle mode

0 = Continue operation even in Idle mode

Unimplemented: Read as ‘0’

TGATE: Timer Gated Time Accumulation Enable bit(3)

When TCS = 1:

This bit is ignored and is read as ‘0’.

When TCS = 0:

1 = Gated time accumulation is enabled

0 = Gated time accumulation is disabled

TCKPS<2:0>: Timer Input Clock Prescale Select bits(3)

111 = 1:256 prescale value

110 = 1:64 prescale value

101 = 1:32 prescale value

100 = 1:16 prescale value

011 = 1:8 prescale value

010 = 1:4 prescale value

001 = 1:2 prescale value

000 = 1:1 prescale value

Note 1:

2:

3:

4:

When using 1:1 PBCLK divisor, the user’s software should not read/write the peripheral SFRs in the

SYSCLK cycle immediately following the instruction that clears the module’s ON bit.

This bit is available only on even numbered timers (Timer2 and Timer4).

While operating in 32-bit mode, this bit has no effect for odd numbered timers (Timer3 and Timer5). All

timer functions are set through the even numbered timers.

While operating in 32-bit mode, this bit must be cleared on odd numbered timers to enable the 32-bit timer

in Idle mode.

DS60001290E-page 166

 2014-2017 Microchip Technology Inc.

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