PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F128L-I/PF

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

15.0 INPUT CAPTURE

Note:

This data sheet summarizes the features

of the PIC32MX1XX/2XX/5XX 64/100-pin

family of devices. It is not intended to be

a comprehensive reference source. To

complement the information in this data

sheet, refer to Section 15. “Input

Capture” (DS60001122) of the “PIC32

Family Reference Manual”, which is

available from the Microchip web site

(www.microchip.com/PIC32).

The Input Capture module is useful in applications

requiring frequency (period) and pulse measurement.

The Input Capture module captures the 16-bit or 32-bit

value of the selected Time Base registers when an

event occurs at the ICx pin. The following events cause

capture events:

• Simple capture event modes:

- Capture timer value on every falling edge of

input at ICx pin

- Capture timer value on every rising edge of

input at ICx pin

- Capture timer value on every edge (rising

and falling)

- Capture timer value on every edge (rising

and falling), specified edge first.

• Prescaler capture event modes:

- Capture timer value on every 4th rising edge of

input at ICx pin

- Capture timer value on every 16th rising edge of

input at ICx pin

Each input capture channel can select between one of

two 16-bit timers (Timer2 or Timer3) for the time base,

or two 16-bit timers (Timer2 and Timer3) together to

form a 32-bit timer. The selected timer can use either

an internal or external clock.

The other operational features include:

• Device wake-up from capture pin during CPU

Sleep and Idle modes

• Interrupt on input capture event

• 4-word FIFO buffer for capture values

Interrupt optionally generated after 1, 2, 3, or 4

buffer locations are filled

• Input capture can also be used to provide

additional sources of external interrupts

FIGURE 15-1:

INPUT CAPTURE BLOCK DIAGRAM

FEDGE

Specified/Every

Edge Mode

ICM<2:0>

110

ICx pin

Prescaler Mode

(16th Rising Edge)

Prescaler Mode

(4th Rising Edge)

Rising Edge Mode

Falling Edge Mode

101

TMR2 TMR3

C32 | ICTMR

100

CaptureEvent

FIFO CONTROL

011

To CPU

ICxBUF

010

FIFO

Edge Detection

001

Mode

Sleep/Idle

Wake-up Mode

ICI<1:0>

/N

Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.

ICM<2:0>

Set Flag ICxIF

(In IFSx Register)

001

111

 2014-2017 Microchip Technology Inc.

DS60001290E-page 173

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