PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F128L-I/PF

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

REGISTER 17-3: SPIxSTAT: SPI STATUS REGISTER (CONTINUED)

bit 3

SPITBE: SPI Transmit Buffer Empty Status bit

1 = Transmit buffer, SPIxTXB is empty

0 = Transmit buffer, SPIxTXB is not empty

Automatically set in hardware when SPI transfers data from SPIxTXB to SPIxSR.

Automatically cleared in hardware when SPIxBUF is written to, loading SPIxTXB.

bit 2

Unimplemented: Read as ‘0’

bit 1

SPITBF: SPI Transmit Buffer Full Status bit

1 = Transmit not yet started, SPITXB is full

0 = Transmit buffer is not full

Standard Buffer Mode:

Automatically set in hardware when the core writes to the SPIBUF location, loading SPITXB.

Automatically cleared in hardware when the SPI module transfers data from SPITXB to SPISR.

Enhanced Buffer Mode:

Set when CWPTR + 1 = SRPTR; cleared otherwise

bit 0

SPIRBF: SPI Receive Buffer Full Status bit

1 = Receive buffer, SPIxRXB is full

0 = Receive buffer, SPIxRXB is not full

Standard Buffer Mode:

Automatically set in hardware when the SPI module transfers data from SPIxSR to SPIxRXB.

Automatically cleared in hardware when SPIxBUF is read from, reading SPIxRXB.

Enhanced Buffer Mode:

Set when SWPTR + 1 = CRPTR; cleared otherwise

 2014-2017 Microchip Technology Inc.

DS60001290E-page 189

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