PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F128L-I/PF

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

REGISTER 23-5: C1TREC: CAN TRANSMIT/RECEIVE ERROR COUNT REGISTER

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1

31:24

U-0

—

U-0

23:16

—

15:8

R-0

7:0

R-0

U-0

U-0

U-0

U-0

U-0

U-0

—

—

—

—

—

—

U-0

R-0

R-0

R-0

R-0

R-0

—

TXBO

TXBP

RXBP TXWARN RXWARN

R-0

R-0

R-0

R-0

R-0

R-0

TERRCNT<7:0>

R-0

R-0

R-0

R-0

R-0

R-0

RERRCNT<7:0>

Bit

24/16/8/0

U-0

—

R-0

EWARN

R-0

R-0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-22 Unimplemented: Read as ‘0’

bit 21 TXBO: Transmitter in Error State Bus OFF (TERRCNT  256)

bit 20 TXBP: Transmitter in Error State Bus Passive (TERRCNT  128)

bit 19 RXBP: Receiver in Error State Bus Passive (RERRCNT  128)

bit 18 TXWARN: Transmitter in Error State Warning (128 > TERRCNT  96)

bit 17 RXWARN: Receiver in Error State Warning (128 > RERRCNT  96)

bit 16 EWARN: Transmitter or Receiver is in Error State Warning

bit 15-8 TERRCNT<7:0>: Transmit Error Counter

bit 7-0 RERRCNT<7:0>: Receive Error Counter

REGISTER 23-6: C1FSTAT: CAN FIFO STATUS REGISTER

Bit

Range

31:24

23:16

15:8

7:0

Bit

31/23/15/7

U-0

—

U-0

—

R-0

FIFOIP15

R-0

FIFOIP7

Bit

30/22/14/6

U-0

—

U-0

—

R-0

FIFOIP14

R-0

FIFOIP6

Bit

29/21/13/5

U-0

—

U-0

—

R-0

FIFOIP13

R-0

FIFOIP5

Bit

28/20/12/4

U-0

—

U-0

—

R-0

FIFOIP12

R-0

FIFOIP4

Bit

27/19/11/3

U-0

—

U-0

—

R-0

FIFOIP11

R-0

FIFOIP3

Bit

26/18/10/2

U-0

—

U-0

—

R-0

FIFOIP10

R-0

FIFOIP2

Bit

25/17/9/1

U-0

—

U-0

—

R-0

FIFOIP9

R-0

FIFOIP1

Bit

24/16/8/0

U-0

—

U-0

—

R-0

FIFOIP8

R-0

FIFOIP0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-16 Unimplemented: Read as ‘0’

bit 15-0 FIFOIP<15:0>: FIFOx Interrupt Pending bits

1 = One or more enabled FIFO interrupts are pending

0 = No FIFO interrupts are pending

 2014-2017 Microchip Technology Inc.

DS60001290E-page 253

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