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PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

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Description
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PIC32MX230F128L-I/PF Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 23-9: C1RXMn: CAN ACCEPTANCE FILTER MASK ‘n’ REGISTER (n = 0, 1, 2 OR 3)
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
31:24
23:16
15:8
7:0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SID<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SID<10:3>
U-0
R/W-0
MIDE
R/W-0
R/W-0
EID<15:8>
R/W-0
R/W-0
EID<7:0>
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
EID<17:16>
R/W-0
R/W-0
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-21
bit 20
bit 19
bit 18
bit 17-0
SID<10:0>: Standard Identifier bits
1 = Include the SIDx bit in filter comparison
0 = The SIDx bit is a ‘don’t care’ in filter operation
Unimplemented: Read as ‘0
MIDE: Identifier Receive Mode bit
1 = Match only message types (standard/extended address) that correspond to the EXID bit in filter
0 = Match either standard or extended address message if filters match (that is, if (Filter SID) = (Message
SID) or if (FILTER SID/EID) = (Message SID/EID))
Unimplemented: Read as ‘0
EID<17:0>: Extended Identifier bits
1 = Include the EIDx bit in filter comparison
0 = The EIDx bit is a ‘don’t care’ in filter operation
Note: This register can only be modified when the CAN module is in Configuration mode (OPMOD<2:0>
(C1CON<23:21>) = 100).
2014-2017 Microchip Technology Inc.
DS60001290E-page 255

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