MCP795W22T-I/SL View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
MCP795W22T-I/SL Datasheet PDF : 54 Pages
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MCP795W1X/MCP795W2X
REGISTER 5-11: WATCHDOG 0X0A
R/W
WDTEN
bit 7
R/W
WDTIF
bit 6
R/W
WDDEL
bit 5
R/W
WDTPLS
bit 4
R/W
WD3
bit 3
R/W
WD2
bit 2
R/W
WD1
bit 1
R/W
WD0
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
bit 7
bit 6
bit 5
bit 4
bit 3-0
WDTEN: Watchdog Timer Enable bit
This bit is a read/write bit that is set by the user and can be cleared by the user of the hardware. This
bit is set to enable the WDT function and cleared to disable the function. This bit is cleared by the
hardware when the VCC supply is not present, it is not set again when VCC is present.
WDTIF: Watchdog Timer Interrupt Flag bit
This bit is a read/write bit that is set in hardware when the WDT times out and the WD pin is asserted.
This bit must be cleared in software to restart the WDT.
WDDEL: Watchdog Timer Delay bit
This bit is a read/write bit and is set to enable a 64-second delay before the WDT starts to count. If
this bit is set and the WDTIF bit is cleared then there will be a 64 second delay before the WDT starts
to count. This bit should be set before the WDTEN bit is set.
WDTPLS: Watchdog Timer Reset Pulse Width bit
A read/write bit that is used to select the pulse width on the WD pin when the WDT times out.
- 0 – 122 us Pulse
- 1 – 125 ms Pulse
WD<3:0>: Watchdog Timer Configuration bits
Read/write bits that are used to set the WDT time-out period as below (all times are based off the
uncalibrated crystal reference). Bit 3 should be cleared and is reserved for future use:
- 000 – 977 us
- 001 – 15.6 ms
- 010 – 62.5 ms
- 011 – 125 ms
- 100 – 1s
- 101 – 16s
- 110 – 32s
- 111 – 64s
Note 1: Please see Section 9.1.3, Watchdog Timer for more information.
DS22280C-page 16
Preliminary
2011-2012 Microchip Technology Inc.
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