DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Legacy Bridge—Intel® Quark SoC X1000

21.0

21.1

Legacy Bridge

The Legacy Bridge is a collection of hardware blocks that are critical to implement a PC/

AT compatible platform. Certain legacy hardware functions are required to support

commercially available, shrink-wrap operating systems. In addition, the Legacy Bridge

provides interrupt decoding and routing functionality, power management features, and

a SPI interface for system firmware.

Features

The key features of the various blocks are as follows:

• General Purpose Input Output

— Legacy control interface for SoC GPIOs

— I/O mapped registers

• 8259 Programmable Interrupt Controller

— Legacy interrupt support

— 15 total interrupts through two cascaded controllers

— I/O mapped registers

• I/O Advanced Programmable Interrupt Controller

— Legacy-free interrupt support

— 24 total interrupts

— Memory mapped registers

• 8254 Programmable Interval Timer

— Legacy timer support

— Three timers with fixed uses: System Timer, Refresh Request Signal, and

Speaker Tone

— I/O mapped registers

• HPET - High Performance Event Timers

— Legacy-free timer support

— Three timers and one counter

— Memory mapped registers

• Real-Time Clock (RTC)

— 242-byte RAM backed by battery (aka CMOS RAM)

— Can generate wake/interrupt when time matches programmed value

— I/O and indexed registers

• Watchdog Timer (WDT)

— Provides ability to trigger a reset in the event of an unresponsive system

— Resolution from 1sec to 17 minutes

October 2013

Document Number: 329676-001US

Intel® Quark SoC X1000

DS

801

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