DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel
Part Name
Description
Manufacturer
DHQ1ECCSECETS1SR1WH Datasheet PDF : 921 Pages
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Legacy Bridge—Intel® Quark SoC X1000
31
28
24
20
16
12
8
4
0
00000000000000000000000000000000
Bit
Default &
Range Access
Description
31
0b
RW
Enable (EN): When set, decode of the I/O range pointed to by the BA is enabled.
30:16
0b
RO
Reserved (RSV2): Reserved.
15:6
0b
RW
Base Address (BA): Provides the 64 bytes of I/O space for WDT.
5:0
0b
RO
Reserved (RSV1): Reserved.
21.3.13
BIOS Decode Enable (BCE)—Offset D4h
Access Method
Type: PCI Configuration Register
(Size: 32 bits)
BCE: [B:0, D:31, F:0] + D4h
Default: FF000000h
31
28
24
20
16
12
8
4
0
11111111000000000000000000000000
Bit
Default &
Range Access
Description
F8-FF Enable (EF8): Enables decoding of BIOS range FFF80000h - FFFFFFFFh and
31
1b
RO
FFB80000h - FFBFFFFFh.
0 = Disable
1 = Enable
F0-F0 Enable (EF0): Enables decoding of BIOS range FFF00000h - FFF7FFFFh and
30
1b
RW
FFB00000h - FFB7FFFFh.
0 = Disable
1 = Enable
E8-EF Enable (EE8): Enables decoding of BIOS range FFE80000h - FFEFFFFFh and
29
1b
RW
FFA80000h - FFAFFFFFh.
0 = Disable
1 = Enable
E0-E8 Enable (EE0): Enables decoding of BIOS range FFE00000h - FFE7FFFFh and
28
1b
RW
FFA00000h - FFA7FFFFh.
0 = Disable
1 = Enable
D8-DF Enable (ED8): Enables decoding of BIOS range FFD80000h - FFDFFFFFh and
27
1b
RW
FF980000h - FF9FFFFFh.
0 = Disable
1 = Enable
D0-D8 Enable (ED0): Enables decoding of BIOS range FFD00000h - FFD7FFFFh and
26
1b
RW
FF900000h - FF97FFFFh.
0 = Disable
1 = Enable
October 2013
Document Number: 329676-001US
Intel® Quark SoC X1000
DS
811
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