DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Intel® Quark SoC X1000—Legacy Bridge

21.4.1.1

Root Complex Topology Capabilities List (RCTCL)—Offset 0h

Access Method

Type: Memory Mapped I/O Register

(Size: 32 bits)

RCTCL: [RCBA] + 0h

RCBA Type: PCI Configuration Register (Size: 32 bits)

RCBA Reference: [B:0, D:31, F:0] + F0h

Default: 00010005h

31

28

24

20

16

12

8

4

0

00000000000000010000000000000101

Bit

Default &

Range Access

Description

31:20

19:16

15:0

0b

RO

1h

RO

0005h

RO

Next Capability (NEXTCAP): Indicates next item in the list

Capability Version (CAPVER): Indicates the version of the capability structure.

Capability ID (CAPID): Indicates this is a PCI Express link capability section of an

RCRB

21.4.1.2

Element Self Description (ESD)—Offset 4h

Provides information about the root complex element containing the Link Declaration

Capability

Access Method

Type: Memory Mapped I/O Register

(Size: 32 bits)

ESD: [RCBA] + 4h

RCBA Type: PCI Configuration Register (Size: 32 bits)

RCBA Reference: [B:0, D:31, F:0] + F0h

Default: 00000102h

31

28

24

20

16

12

8

4

0

00000000000000000000000100000010

Bit

Default &

Range Access

Description

31:24

23:16

15:8

0b

RO

0b

RW/O

01h

RO

Port Number (PORTNUM): A value of 0 to indicate the egress port

Component ID (COMPID): Indicates the component ID assigned to this element by

software. This is written once by BIOS and is locked until a reset.

Number of Link Entries (NUMLE): Indicates that one link entry is described by this

RCRB.

Intel® Quark SoC X1000

DS

814

October 2013

Document Number: 329676-001US

Share Link: