AT90PWM2(2005) View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT90PWM2
(Rev.:2005)

8-bit Microcontroller with 8K Bytes In-System Programmable Flash

Atmel Corporation 

System Clock

Clock Systems and their

Distribution

Figure 13 presents the principal clock systems in the AVR and their distribution. All of

the clocks need not be active at a given time. In order to reduce power consumption, the

clocks to unused modules can be halted by using different sleep modes, as described in

“Power Management and Sleep Modes” on page 39. The clock systems are detailed

below.

Figure 13. Clock Distribution

PSC0/1/2

General I/O

Modules

ADC

CPU Core

RAM

Flash and

EEPROM

CLKPLL

PLL

clkI/O

clkADC

AVR Clock

Control Unit

clkCPU

clkFLASH

Reset Logic

Watchdog Timer

Source Clock

Clock

Multiplexer

Watchdog Clock

Watchdog

Oscillator

CPU Clock – clkCPU

I/O Clock – clkI/O

Flash Clock – clkFLASH

PLL Clock – clkPLL

External Clock

(Crystal

Oscillator)

Calibrated RC

Oscillator

The CPU clock is routed to parts of the system concerned with operation of the AVR

core. Examples of such modules are the General Purpose Register File, the Status Reg-

ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the

core from performing general operations and calculations.

The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI,

USART. The I/O clock is also used by the External Interrupt module, but note that some

external interrupts are detected by asynchronous logic, allowing such interrupts to be

detected even if the I/O clock is halted.

The Flash clock controls operation of the Flash interface. The Flash clock is usually

active simultaneously with the CPU clock.

The PLL clock allows the PSC modules to be clocked directly from a 64/32 MHz clock. A

16 MHz clock is also derived for the CPU.

30 AT90PWM2/3

4317B–AVR–02/05

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