AT90PWM2B-16SU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT90PWM2B-16SU
Atmel Corporation
AT90PWM2B-16SU Datasheet PDF : 365 Pages
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AT90PWM2/3/2B/3B
Table 16-9. Output Clock versus Selection and Prescaler
PCLKSELn PPREn1
PPREn0
CLKPSCn output
AT90PWM2/3
0
0
0
CLK I/O
0
0
1
CLK I/O / 4
0
1
0
CLK I/O / 16
0
1
1
CLK I/O / 64
1
0
0
CLK PLL
1
0
1
CLK PLL / 4
1
1
0
CLK PLL / 16
1
1
1
CLK PLL / 64
CLKPSCn output
AT90PWM2B/3B
CLK I/O
CLK I/O / 4
CLK I/O / 32
CLK I/O / 256
CLK PLL
CLK PLL / 4
CLK PLL / 32
CLK PLL / 256
16.24 Interrupts
This section describes the specifics of the interrupt handling as performed in
AT90PWM2/2B/3/3B.
16.24.1
List of Interrupt Vector
Each PSC provides 2 interrupt vectors
• PSCn EC (End of Cycle): When enabled and when a match with OCRnRB occurs
• PSCn CAPT (Capture Event): When enabled and one of the two following events occurs :
retrigger, capture of the PSC counter or Synchro Error.
16.26.216.26.2See PSCn Interrupt Mask Register page 172 and PSCn Interrupt Flag Register
page 173.
16.24.2 PSC Interrupt Vectors in AT90PWM2/2B/3/3B
Table 16-10. PSC Interrupt Vectors
Vector
No.
Program
Address
Source
-
-
-
2
0x0001 PSC2 CAPT
3
0x0002 PSC2 EC
4
0x0003 PSC1 CAPT
5
0x0004 PSC1 EC
6
0x0005 PSC0 CAPT
7
0x0006 PSC0 EC
-
-
-
Interrupt Definition
-
PSC2 Capture Event or Synchronization Error
PSC2 End Cycle
PSC1 Capture Event or Synchronization Error
PSC1 End Cycle
PSC0 Capture Event or Synchronization Error
PSC0 End Cycle
-
4317K–AVR–03/2013
162
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