AT90PWM2/3/2B/3B
Table 19-2.
URxS3
1
1
1
1
1
URxS Bits Settings
URxS2
URxS1
0
0
0
1
0
1
1
0
1
0
1
1
1
1
1
1
URxS0
1
0
1
0
1
0
1
Receive Character Size
14-bit
15-bit
16-bit
Reserved
Reserved
16 OR 17 bit (for Manchester
encoded only mode)
17-bit
19.6.4
EUSART Control Register B – EUCSRB
Bit
Read/Write
Initial Value
7
6
5
4
3
2
1
0
-
-
-
EUSART EUSBS
-
EMCH
BODR
EUCSRB
R
R
R
R/W
R/W
R
R/W
R/W
0
0
0
0
0
0
0
0
• Bit 7:5 –Reserved Bits
These bits are reserved for future use. For compatibilty with future devices, these bits must be
written to zero when EUSCRB is written.
• Bit 4 – EUSART Enable Bit
Set to enable the EUSART mode, clear to operate as standard USART.
• Bit 3– EUSBS Enable Bit
This bit selects the number of stop bits detected by the receiver.
Table 19-3.
EUSBS Bit Settings
EUSBS
0
1
Receiver Stop Bit(s)
1-bit
2-bit
Note: The number of stop bit inserted by the Transmitter in EUSART mode is configurable through the
USBS bit of in the of the USART.
• Bit 2–Reserved Bit
This bit is reserved for future use. For compatibility with future devices, this bit must be written to
zero when EUSCRB is written.
• Bit 1 – Manchester mode
When set the EUSART operates in manchester encoder/decoder mode (Manchester encoded
frames). When cleared the EUSART detected and transmit level encoded frames.
4317K–AVR–03/2013
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