DSPIC33FJ128GP706AI-ES View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ128GP706AI-ES Datasheet PDF : 350 Pages
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dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 8-2: DMAxREQ: DMA CHANNEL x IRQ SELECT REGISTER
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
FORCE(1)
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
IRQSEL6(2) IRQSEL5(2) IRQSEL4(2) IRQSEL3(2)
R/W-0
IRQSEL2(2)
R/W-0
IRQSEL1(2)
R/W-0
IRQSEL0(2)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-7
bit 6-0
FORCE: Force DMA Transfer bit(1)
1 = Force a single DMA transfer (Manual mode)
0 = Automatic DMA transfer initiation by DMA request
Unimplemented: Read as ‘0’
IRQSEL<6:0>: DMA Peripheral IRQ Number Select bits(2)
1111111 = DMAIRQ127 selected to be Channel DMAREQ
•
•
•
0000000 = DMAIRQ0 selected to be Channel DMAREQ
Note 1: The FORCE bit cannot be cleared by the user. The FORCE bit is cleared by hardware when the forced
DMA transfer is complete.
2: Please see Table 8-1 for a complete listing of IRQ numbers for all interrupt sources.
DS70593C-page 142
© 2011 Microchip Technology Inc.
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