DSPIC33FJ128GP706AI-ES View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ128GP706AI-ES Datasheet PDF : 350 Pages
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dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 8-5: DMAxPAD: DMA CHANNEL x PERIPHERAL ADDRESS REGISTER(1)
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
PAD<15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
PAD<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
PAD<15:0>: Peripheral Address Register bits
Note 1: If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
REGISTER 8-6: DMAxCNT: DMA CHANNEL x TRANSFER COUNT REGISTER(1)
U-0
—
bit 15
U-0
U-0
U-0
U-0
—
—
—
—
U-0
R/W-0
R/W-0
—
CNT<9:8>(2)
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
CNT<7:0>(2)
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-10
bit 9-0
Unimplemented: Read as ‘0’
CNT<9:0>: DMA Transfer Count Register bits(2)
Note 1: If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
2: Number of DMA transfers = CNT<9:0> + 1.
DS70593C-page 144
© 2011 Microchip Technology Inc.
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