dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 20-2: DCICON2: DCI CONTROL REGISTER 2
U-0
—
bit 15
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
BLEN<1:0>
U-0
R/W-0
—
COFSG3
bit 8
R/W-0
bit 7
R/W-0
COFSG<2:0>
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
WS<3:0>
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
bit 11-10
bit 9
bit 8-5
bit 4
bit 3-0
Unimplemented: Read as ‘0’
BLEN<1:0>: Buffer Length Control bits
11 = Four data words will be buffered between interrupts
10 = Three data words will be buffered between interrupts
01 = Two data words will be buffered between interrupts
00 = One data word will be buffered between interrupts
Unimplemented: Read as ‘0’
COFSG<3:0>: Frame Sync Generator Control bits
1111 = Data frame has 16 words
•
•
•
0010 = Data frame has 3 words
0001 = Data frame has 2 words
0000 = Data frame has 1 word
Unimplemented: Read as ‘0’
WS<3:0>: DCI Data Word Size bits
1111 = Data word size is 16 bits
•
•
•
0100 = Data word size is 5 bits
0011 = Data word size is 4 bits
0010 = Invalid Selection. Do not use. Unexpected results may occur
0001 = Invalid Selection. Do not use. Unexpected results may occur
0000 = Invalid Selection. Do not use. Unexpected results may occur
DS70593C-page 234
© 2011 Microchip Technology Inc.