STM32L151VCT7DTR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32L151VCT7DTR

Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 256KB Flash, 32KB SRAM, 8KB EEPROM, LCD, USB, ADC, DAC

STMicroelectronics 

STM32L151xC STM32L152xC

Revision History

Date

20-Aug-2015

10-Mar-2016

25-Aug-2017

Table 75. Document revision history (continued)

Revision

Changes

Updated Table 17: Embedded internal reference voltage temperature

coefficient at 100ppm/°C and table footnote 3: “guaranteed by design”

11

changed by “guaranteed by characterization results”.

Updated Table 64: Comparator 2 characteristics new maximum

threshold voltage temperature coefficient at 100ppm/°C.

Updated cover page putting eight SPIs in the peripheral

communication interface list.

Updated Table 2: Ultra-low-power STM32L151xC and STM32L152xC

device features and peripheral counts SPI and I2S lines.

Updated Table 40: ESD absolute maximum ratings CDM class.

12

Updated all the notes, removing ‘not tested in production’.

Updated thermal resistance for UFQFPN48 to value of 33 °C/W.

Updated Table 11: Voltage characteristics adding note about VREF- pin.

Updated Table 5: Functionalities depending on the working mode (from

Run/active down to standby) LSI and LSE functionalities putting “Y” in

Standby mode.

Removed note 1 below Figure 2: Clock tree.

Updated Table 43: I/O static characteristics pull-up and pull-down

values.

Updated Table 46: NRST pin characteristics pull-up values.

Updated Section 7: Package information adding information about

other optional marking or inset/upset marks.

Updated note 1 below all the package device marking figures.

Updated Section 7: Package information replacing “Marking of

engineering samples” by “device marking”.

Updated Nested vectored interrupt controller (NVIC) in Section 3.2:

ARM® Cortex®-M3 core with MPU about process state automatically

saved.

13

Updated Table 3: Functionalities depending on the operating power

supply range removing I/O operation column and adding note about

GPIO speed.

Updated Table 42: I/O current injection susceptibility note by ‘injection

is not possible’.

Updated Figure 20: Recommended NRST pin protection note about

the 0.1uF capacitor.

Updated Table 59: DAC characteristics resistive load.

Updated Section 3.1: Low-power modes Low-power run mode (MSI)

RC oscillator clock.

Updated Table 5: Functionalities depending on the working mode

(from Run/active down to standby) disabling I2C functionality in Low-

power Run and Low-power Sleep modes.

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