STM32F373VBT7(2013) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F373VBT7
(Rev.:2013)

ARM Cortex-M4 32b MCU+FPU, up to 256KB Flash+32KB SRAM timers, 4 ADCs (12/16-bit), 3 DACs, 2 comp., 2.0-3.6 V operation

STMicroelectronics 

STM32F37xxx

Electrical characteristics

6.3.18 DAC electrical specifications

Symbol

Parameter

Table 63. DAC characteristics

Min Typ

Max

Unit

Comments

VDDA

VREF+

VSSA

RLOAD(1)

Analog supply voltage

Reference supply voltage

Ground

Resistive load with buffer

ON

RO(1)

Impedance output with

buffer OFF

CLOAD(1) Capacitive load

DAC_OUT Lower DAC_OUT voltage

min(1)

with buffer ON

DAC_OUT Higher DAC_OUT voltage

max(1)

with buffer ON

DAC_OUT Lower DAC_OUT voltage

min(1)

with buffer OFF

DAC_OUT Higher DAC_OUT voltage

max(1)

with buffer OFF

IDDVREF+(3

)

DAC DC current

consumption in quiescent

mode (Standby mode)

IDDA(3)

DAC DC current

consumption in quiescent

mode(2)

2.4 -

2.4 -

0

-

3.6

V

3.6

V VREF+ must always be below VDDA

0

V

5

-

-

kΩ

-

-

When the buffer is OFF, the

15

kΩ

Minimum resistive load between

DAC_OUT and VSS to have a 1%

accuracy is 1.5 MΩ

-

-

Maximum capacitive load at

50

pF DAC_OUT pin (when the buffer is

ON).

It gives the maximum output

0.2 -

-

V excursion of the DAC.

It corresponds to 12-bit input code

(0x0E0) to (0xF1C) at VREF+ = 3.6 V

-

-

VDDA – 0.2

V and (0x155) and (0xEAB) at VREF+

= 2.4 V

- 0.5

-

mV

It gives the maximum output

-

-

VREF+ –

1LSB

excursion of the DAC.

V

-

-

With no load, worst code (0xF1C) at

220

µA VREF+ = 3.6 V in terms of DC

consumption on the inputs

-

-

380

µA

With no load, middle code (0x800)

on the inputs

-

-

With no load, worst code (0xF1C) at

480

µA VREF+ = 3.6 V in terms of DC

consumption on the inputs

DNL(3)

Differential non linearity

Difference between two

consecutive code-1LSB)

-

-

-

-

Integral non linearity

(difference between

-

-

INL(3)

measured value at Code i

and the value at Code i on a

line drawn between Code 0 -

-

and last Code 1023)

±0.5

LSB

Given for the DAC in 10-bit

configuration

±2

LSB

Given for the DAC in 12-bit

configuration

±1

LSB

Given for the DAC in 10-bit

configuration

±4

LSB

Given for the DAC in 12-bit

configuration

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