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ML2721DH View Datasheet(PDF) - Micro Linear Corporation

Part Name
Description
Manufacturer
ML2721DH
Micro-Linear
Micro Linear Corporation 
ML2721DH Datasheet PDF : 27 Pages
First Prev 21 22 23 24 25 26 27
PRELIMINARY
ML2721
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Normal Temperature Range ........................ -10°C to 60°C
VDD, VCC2, VCC5 Range .............................2.7V to 5.5V
Thermal Resistance (qJA) (Note 2) ...................... 100°C/W
VDD, VCC2, VCC5 .................................................... 6.0V
VSS, GND ........................................................... 0 ±0.3V
Junction Temperature .............................................. 150°C
Storage Temperature Range ..................... 65°C to 150°C
Lead Temperature (Soldering, 10s) .......................... 260°C
ELECTRICAL TABLES
Unless otherwise specified, VCC5 & VDD = 3.3V, TA = Operating Temperature Range. (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
POWER CONSUMPTION
All Circuits, Sleep Mode
DC Connected, XCEN low
10
Supply Current, Receive Mode
40
Supply Current, RX CAL Mode
48
Supply Current, Transmit Mode
40
Supply Current, TX CAL Mode
49
VCO AND LO PLL
LO output frequency
In 512kHz steps
915±15
Phase noise at driver output
1.2MHz
3MHz
>7MHz
VCO phase locked, loop band width
50kHz. Discontinuities, other than
reference spurs, not allowed.
100
120
125
LO PLL reference frequency at phase
detector
PLL main divider input is at 1.83GHz
1.024
LO division range integer
PLL divider limits
1024
LO charge pump sink/source current
5.5
LO lock up time for Transmit/Receive
From PLLEN asserted
frequency change
<70
LO lock up time for channel switch
From PLLEN asserted, any channel
change in 902 to 928 MHz band
<150
LO lock up time from sleep
From XCEN, PLL dividers
programmed
<300
Reference signal input level
6.144 or 12.288MHz sine wave,
capacitively coupled
2.0
RECEIVE CHAIN
Receive RF input noise figure
10
Maximum Receive RF input
Correct demodulation of FSK signal
0
Receive RF input IP3
Test tones 2 and 4 channels away
12
MAX
UNITS
µA
mA
mA
mA
mA
MHz
dBc/Hz
MHz
4095
mA
µs
µs
µs
VP-P
dB
dBm
dBm
24
PRELIMINARY DATASHEET January, 2000

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