ST10F276-4TR3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST10F276-4TR3

16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM

STMicroelectronics 

Internal Flash memory

ST10F276E

4.3.4

Flash control register 1 high

The Flash control register 1 high (FCR1H), together with Flash control register 1 low

(FCR1L), is used to select the sectors to erase, or during any write operation to monitor the

status of each sector and each bank of the module selected by SMOD bit of FCR0H. First

diagram shows FCR1H meaning when SMOD = 0; the second one when SMOD = 1.

FCR1H (0x0E 0006) SMOD = 0

15 14 13 12 11 10

FCR

987

Reserved

B3S B2S

RS RS

Reset value: 0000h

6543210

Reserved

B3F1 B3F0

RS RS

FCR1H (0x0E 0006) SMOD = 1

15 14 13 12 11 10

FCR

987

Reserved

B1S B0S

-

RS RS

Reset value: 0000h

6543210

Reserved

B1F1 B1F0

RS RS

Table 9.

Bit

Flash control register 1 high

Function

SMOD = 0 (XFLASH selected)

B3F(1:0)

B(3:2)S

Bank 3 XFLASH sector 1:0 status

During any erase operation, these bits are automatically set and give the status of the

two sectors of Bank 3 (B3F1-B3F0). The meaning of B3Fy bit for sector y of Bank 1 is

given by Table 10. These bits are automatically reset at the end of a erase operation if

no errors are detected.

Bank 3-2 status (XFLASH)

During any erase operation, these bits are automatically modified and give the status

of the two banks (B3-B2). The meaning of BxS bit for bank x is given in Table 10.

These bits are automatically reset at the end of a erase operation if no errors are

detected.

SMOD = 1 (IFLASH selected)

B1F(1:0)

B(1:0)S

Bank 1 IFLASH sector 1:0 status

During any erase operation, these bits are automatically set and give the status of the

two sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of Bank 1 is

given by Table 10. These bits are automatically reset at the end of a erase operation if

no errors are detected.

Bank 1-0 status (IFLASH)

During any erase operation, these bits are automatically modified and give the status

of the two banks (B1-B0). The meaning of BxS bit for bank x is given in Table 10.

These bits are automatically reset at the end of a erase operation if no errors are

detected.

During any erase operation, these bits are automatically set and give the status of the two

sectors of Bank 1 (B1F1-B1F0). The meaning of B1Fy bit for sector y of Bank 1 is given by

Table 10. These bits are automatically reset at the end of a erase operation if no errors are

detected.

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Doc ID 12303 Rev 3

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