M24C02-WDW6G View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M24C02-WDW6G

1-Kbit and 2-Kbit serial I²C bus EEPROMs

STMicroelectronics 

Device operation

M24C01/02-W M24C01/02-R M24C02-F

4.5

Device addressing

To start communication between the bus master and the slave device, the bus master must

initiate a Start condition. Following this, the bus master sends the device select code, shown

in Table 2 (on Serial Data (SDA), most significant bit first).

Table 2. Device select code

Device type identifier(1)

Chip Enable address

RW

b7

b6

b5

b4

b3

b2

b1

b0

1

0

1

0

E2

E1

E0

RW

1. The most significant bit, b7, is sent first.

The 8th bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.

If a match occurs on the device select code, the corresponding device gives an

acknowledgment on Serial Data (SDA) during the 9th bit time. If the device does not match

the device select code, it deselects itself from the bus, and goes into Standby mode.

12/34

DocID024020 Rev 2

Share Link: