dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-17: IEC6: INTERRUPT ENABLE CONTROL REGISTER 6
R/W-0
R/W-0
U-0
U-0
U-0
U-0
ADCP1IE ADCP0IE
—
—
—
—
bit 15
R/W-0
AC4IE(1,2)
R/W-0
AC3IE(1,2)
bit 8
R/W-0
U-0
AC2IE(2)
—
bit 7
U-0
U-0
U-0
—
—
—
U-0
R/W-0
R/W-0
—
PWM4IE(1,3) PWM3IE(4)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-10
bit 9
bit 8
bit 7
bit 6-2
bit 1
bit 0
ADCP1IE: ADC Pair 1 Conversion Done Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
ADCP0IE: ADC Pair 0 Conversion Done Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0
AC4IE: Analog Comparator 4 Interrupt Enable bit(1,2)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
AC3IE: Analog Comparator 3 Interrupt Enable bit(1,2)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
AC2IE: Analog Comparator 2 Interrupt Enable bit(2)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
PWM4IE: PWM4 Interrupt Enable bit(1,3)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
PWM3IE: PWM3 Interrupt Enable bit(4)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Note 1: These bits are unimplemented in dsPIC33FJ06GS202 devices.
2: These bits are unimplemented in dsPIC33FJ06GS101 and dsPIC33FJ16GS502 devices.
3: These bits are unimplemented in dsPIC33FJ16GS402/404/502 devices.
4: These bits are unimplemented in dsPIC33FJ06101/102/202 devices.
DS70318D-page 116
Preliminary
© 2009 Microchip Technology Inc.