DSPIC30F2011AT-30E/SP-ES View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC30F2011AT-30E/SP-ES

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC30F2011/2012/3012/3013

I

TABLE 20-33:

I2C™ BUS DATA TIMING REQUIREMENTS (MASTER MODE)

AC CHARACTERISTICS

Standard Operating Conditions: 2.5V to 5.5V

(unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for Industrial

-40°C ≤ TA ≤ +125°C for Extended

Param

No.

Symbol

Characteristic

Min(1)

Max Units

Conditions

IM10 TLO:SCL Clock Low Time 100 kHz mode TCY/2 (BRG + 1) —

μs

400 kHz mode TCY/2 (BRG + 1) —

μs

1 MHz mode(2) TCY/2 (BRG + 1)

—

μs

IM11 THI:SCL Clock High Time 100 kHz mode TCY/2 (BRG + 1) —

μs

400 kHz mode TCY/2 (BRG + 1) —

μs

1 MHz mode(2) TCY/2 (BRG + 1)

—

μs

IM20

TF:SCL SDA and SCL

Fall Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

—

20 + 0.1 CB

—

300

ns CB is specified to be

300

ns from 10 to 400 pF

100

ns

IM21

TR:SCL SDA and SCL

Rise Time

100 kHz mode

400 kHz mode

1 MHz mode(2)

—

20 + 0.1 CB

—

1000

300

300

ns CB is specified to be

ns from 10 to 400 pF

ns

IM25 TSU:DAT Data Input

100 kHz mode

250

Setup Time

400 kHz mode

100

1 MHz mode(2)

—

—

ns

—

ns

—

ns

IM26 THD:DAT Data Input

100 kHz mode

0

Hold Time

400 kHz mode

0

1 MHz mode(2)

—

—

ns

0.9

μs

—

ns

IM30 TSU:STA Start Condition 100 kHz mode TCY/2 (BRG + 1) —

Setup Time

400 kHz mode TCY/2 (BRG + 1) —

1 MHz mode(2) TCY/2 (BRG + 1)

—

μs Only relevant for

μs Repeated Start

μs condition

IM31 THD:STA Start Condition 100 kHz mode TCY/2 (BRG + 1) —

Hold Time

400 kHz mode TCY/2 (BRG + 1) —

1 MHz mode(2) TCY/2 (BRG + 1)

—

μs After this period the

μs first clock pulse is

μs generated

IM33 TSU:STO Stop Condition 100 kHz mode TCY/2 (BRG + 1) —

μs

Setup Time

400 kHz mode TCY/2 (BRG + 1) —

μs

1 MHz mode(2) TCY/2 (BRG + 1)

—

μs

IM34 THD:STO Stop Condition 100 kHz mode TCY/2 (BRG + 1) —

ns

Hold Time

400 kHz mode TCY/2 (BRG + 1) —

ns

1 MHz mode(2) TCY/2 (BRG + 1)

—

ns

IM40 TAA:SCL Output Valid

100 kHz mode

—

From Clock

400 kHz mode

—

1 MHz mode(2)

—

3500

ns

1000

ns

—

ns

IM45 TBF:SDA Bus Free Time 100 kHz mode

4.7

400 kHz mode

1.3

1 MHz mode(2)

—

—

μs Time the bus must be

—

μs free before a new

—

μs transmission can start

IM50 CB

Bus Capacitive Loading

—

400

pF

Note 1: BRG is the value of the I2C Baud Rate Generator. Refer to Section 21. “Inter-Integrated Circuit™ (I2C)”

in the dsPIC30F Family Reference Manual (DS70046).

2: Maximum pin capacitance = 10 pF for all I2C™ pins (for 1 MHz mode only).

DS70139F-page 176

© 2008 Microchip Technology Inc.

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