DSPIC30F2011AT-30E/SP-ES View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC30F2011AT-30E/SP-ES

High-Performance, 16-bit Digital Signal Controllers

Microchip Technology 

dsPIC30F2011/2012/3012/3013

TABLE 20-34: I2C™ BUS DATA TIMING REQUIREMENTS (SLAVE MODE) (CONTINUED)

AC CHARACTERISTICS

Standard Operating Conditions: 2.5V to 5.5V

(unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for Industrial

-40°C ≤ TA ≤ +125°C for Extended

Param

No.

Symbol

Characteristic

Min

Max Units

Conditions

IS25

TSU:DAT Data Input

Setup Time

100 kHz mode

250

400 kHz mode

100

1 MHz mode(1)

100

—

ns

—

ns

—

ns

IS26

THD:DAT Data Input

Hold Time

100 kHz mode

0

400 kHz mode

0

1 MHz mode(1)

0

—

ns

0.9 μs

0.3 μs

IS30 TSU:STA Start Condition 100 kHz mode

4.7

Setup Time

400 kHz mode

0.6

1 MHz mode(1)

0.25

—

μs

—

μs

—

μs

IS31 THD:STA Start Condition 100 kHz mode

4.0

Hold Time

400 kHz mode

0.6

1 MHz mode(1)

0.25

—

μs

—

μs

—

μs

IS33 TSU:STO Stop Condition 100 kHz mode

4.7

Setup Time

400 kHz mode

0.6

1 MHz mode(1)

0.6

—

μs

—

μs

—

μs

IS34 THD:STO Stop Condition 100 kHz mode

4000

—

ns

Hold Time

400 kHz mode

600

1 MHz mode(1)

250

—

ns

ns

IS40 TAA:SCL Output Valid

100 kHz mode

0

3500 ns

From Clock

400 kHz mode

0

1000 ns

1 MHz mode(1)

0

350 ns

IS45 TBF:SDA Bus Free Time 100 kHz mode

4.7

—

μs

400 kHz mode

1.3

1 MHz mode(1)

0.5

—

μs

—

μs

IS50 CB

Bus Capacitive

—

400 pF

Loading

Note 1: Maximum pin capacitance = 10 pF for all I2C™ pins (for 1 MHz mode only).

Only relevant for Repeated

Start condition

After this period the first

clock pulse is generated

Time the bus must be free

before a new transmission

can start

DS70139F-page 178

© 2008 Microchip Technology Inc.

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