DSPIC30F2012AT-20E/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC30F2012AT-20E/ML Datasheet PDF : 206 Pages
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dsPIC30F2011/2012/3012/3013
Internal Clock Timing Examples ....................................... 160
Internet Address................................................................ 200
Interrupt Controller
Register Map......................................................... 71, 72
Interrupt Priority .................................................................. 66
Traps........................................................................... 67
Interrupt Sequence ............................................................. 69
Interrupt Stack Frame ................................................. 69
Interrupts ............................................................................. 65
L
Load Conditions ................................................................ 157
Low Voltage Detect (LVD) ................................................ 131
Low-Voltage Detect Characteristics .................................. 154
LVDL Characteristics ........................................................ 154
M
Memory Organization.......................................................... 29
Core Register Map...................................................... 39
Microchip Internet Web Site .............................................. 200
Modulo Addressing ............................................................. 44
Applicability ................................................................. 46
Incrementing Buffer Operation Example..................... 45
Start and End Address................................................ 45
W Address Register Selection .................................... 45
MPLAB ASM30 Assembler, Linker, Librarian ................... 144
MPLAB ICD 2 In-Circuit Debugger ................................... 145
MPLAB ICE 2000 High-Performance Universal
In-Circuit Emulator .................................................... 145
MPLAB Integrated Development Environment Software .. 143
MPLAB PM3 Device Programmer .................................... 145
MPLAB REAL ICE In-Circuit Emulator System................. 145
MPLINK Object Linker/MPLIB Object Librarian ................ 144
N
NVM
Register Map............................................................... 53
O
OC/PWM Module Timing Characteristics.......................... 169
Operating Current (IDD)..................................................... 149
Operating Frequency vs Voltage
dsPIC30FXXXX-20 (Extended)................................. 147
Oscillator
Configurations........................................................... 124
Fail-Safe Clock Monitor .................................... 126
Fast RC (FRC) .................................................. 125
Initial Clock Source Selection ........................... 124
Low-Power RC (LPRC)..................................... 125
LP Oscillator Control ......................................... 125
Phase Locked Loop (PLL) ................................ 125
Start-up Timer (OST) ........................................ 124
Operating Modes (Table) .......................................... 122
System Overview ...................................................... 121
Oscillator Selection ........................................................... 121
Oscillator Start-up Timer
Timing Characteristics .............................................. 163
Timing Requirements................................................ 163
Output Compare Interrupts ................................................. 89
Output Compare Module..................................................... 87
Register Map............................................................... 90
Timing Characteristics .............................................. 168
Timing Requirements................................................ 168
Output Compare Operation During CPU Idle Mode............ 89
Output Compare Sleep Mode Operation ............................ 89
P
Packaging Information ...................................................... 185
Marking............................................................. 185, 186
Peripheral Module Disable (PMD) Registers .................... 133
PICSTART Plus Development Programmer..................... 146
Pinout Descriptions............................................................. 16
PLL Clock Timing Specifications ...................................... 159
POR. See Power-on Reset.
Port Write/Read Example ................................................... 60
PORTB
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 61
PORTC
Register Map for dsPIC30F2011/2012/3012/3013 ..... 61
PORTD
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 62
PORTF
Register Map for dsPIC30F2012/3013 ....................... 62
Power Saving Modes........................................................ 131
Idle............................................................................ 132
Sleep ........................................................................ 131
Sleep and Idle........................................................... 121
Power-Down Current (IPD)................................................ 151
Power-up Timer
Timing Characteristics .............................................. 163
Timing Requirements ............................................... 163
Program Address Space..................................................... 29
Construction ............................................................... 31
Data Access from Program Memory
Using Program Space Visibility .......................... 33
Data Access From Program Memory
Using Table Instructions ..................................... 32
Data Access from, Address Generation ..................... 31
Data Space Window into Operation ........................... 34
Data Table Access (LS Word) .................................... 32
Data Table Access (MS Byte) .................................... 33
Memory Map............................................................... 30
Table Instructions
TBLRDH ............................................................. 32
TBLRDL.............................................................. 32
TBLWTH............................................................. 32
TBLWTL ............................................................. 32
Program and EEPROM Characteristics............................ 156
Program Counter ................................................................ 20
Programmable .................................................................. 121
Programmer’s Model .......................................................... 20
Diagram ...................................................................... 21
Programming Operations.................................................... 51
Algorithm for Program Flash....................................... 51
Erasing a Row of Program Memory ........................... 51
Initiating the Programming Sequence ........................ 52
Loading Write Latches................................................ 52
Protection Against Accidental Writes to OSCCON ........... 126
R
Reader Response............................................................. 201
Reset ........................................................................ 121, 127
BOR, Programmable ................................................ 129
Brown-out Reset (BOR)............................................ 121
Oscillator Start-up Timer (OST)................................ 121
POR
Operating without FSCM and PWRT................ 129
With Long Crystal Start-up Time ...................... 129
POR (Power-on Reset)............................................. 127
© 2008 Microchip Technology Inc.
DS70139F-page 199
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