ST7PLITEU09M3TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PLITEU09M3TR

8-bit MCU with single voltage Flash memory, ADC, timers

STMicroelectronics 

ST7LITEU05 ST7LITEU09

15 DEVICE CONFIGURATION AND ORDERING INFORMATION

Each device is available for production in user pro-

grammable versions (FLASH) as well as in factory

coded versions (FASTROM).

ST7PLITEU05 and ST7PLITEU09 devices are

Factory Advanced Service Technique ROM (FAS-

TROM) versions: they are factory-programmed

XFlash devices.

ST7FLITEU05 and ST7FLITEU09 XFlash devices

are shipped to customers with a default program

memory content (FFh).

The FASTROM factory coded parts contain the

code supplied by the customer. This implies that

FLASH devices have to be configured by the cus-

tomer using the Option Bytes while the FASTROM

devices are factory-configured.

15.1 OPTION BYTES

The two option bytes allow the hardware configu-

ration of the microcontroller to be selected.

The option bytes can be accessed only in pro-

gramming mode (for example using a standard

ST7 programming tool).

OPTION BYTE 1

Bits 7:6 = CKSEL[1:0] Start-up clock selection.

This bit is used to select the startup frequency. By

default, the Internal RC is selected.

Configuration

Internal RC as Startup Clock

AWU RC as a Startup Clock

Reserved

External Clock on pin PA5

CKSEL1 CKSEL0

0

0

0

1

1

0

1

1

Bit 5 = Reserved, must always be 1.

Bit 4 = Reserved, must always be 0.

Bit 0 = WDG HALT Watchdog Reset on Halt

This option bit determines if a RESET is generated

when entering HALT mode while the Watchdog is

active.

0: No Reset generation when entering Halt mode

1: Reset generation when entering Halt mode

OPTION BYTE 0

Bits 7:4 = Reserved, must always be set.

Bits 3:2 = SEC[1:0] Sector 0 size definition

This option bit indicates the size of sector 0 ac-

cording to the following table.

Sector 0 Size

SEC0

SEC1

0.5K

0

0

1K

0

1

2K

1

-

Bits 3:2 = LVD[1:0] Low Voltage Detection selec-

tion

These option bits enable the LVD block with a se-

lected threshold as shown in Table 26.

Table 26. LVD Threshold Configuration

LVD Off

Configuration

LVD1 LVD0

11

Highest Voltage Threshold

Medium Voltage Threshold

10

01

Lowest Voltage Threshold

00

Bit 1 = WDG SW Hardware or software watchdog

This option bit selects the watchdog type.

0: Hardware (watchdog always enabled)

1: Software (watchdog to be enabled by software)

Bit 1 = FMP_R Read-out protection

Readout protection, when selected provides a pro-

tection against program memory content extrac-

tion and against write access to Flash memory.

Erasing the option bytes when the FMP_R option

is selected will cause the whole memory to be

erased first, and the device can be reprogrammed.

Refer to Section 4.5 and the ST7 Flash Program-

ming Reference Manual for more details.

0: Read-out protection off

1: Read-out protection on

Bit 0 = FMP_W FLASH write protection

This option indicates if the FLASH program mem-

ory is write protected.

Warning: When this option is selected, the pro-

gram memory (and the option bit itself) can never

be erased or programmed again.

0: Write protection off

1: Write protection on

105/115

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