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ST7PLITEU09M3TR View Datasheet(PDF) - STMicroelectronics

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Description
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ST7PLITEU09M3TR Datasheet PDF : 115 Pages
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ST7LITEU05 ST7LITEU09
INTERRUPTS (Cont’d)
EXTERNAL INTERRUPT CONTROL REGISTER
1 (EICR1)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
0
0 IS21 IS20 IS11 IS10 IS01 IS00
EXTERNAL INTERRUPT CONTROL REGISTER
2 (EICR2)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0 IS41 IS40 IS31 IS30
Bits 7:6 = Reserved
Bits 7:4 = Reserved
Bits 5:4 = IS2[1:0] ei2 sensitivity
These bits define the interrupt sensitivity for ei2
according to Table 11.
Bits 3:2 = IS4[1:0] ei4 sensitivity
These bits define the interrupt sensitivity for ei1
according to Table 11.
Bits 3:2 = IS1[1:0] ei1 sensitivity
These bits define the interrupt sensitivity for ei1
according to Table 11.
Bits 1:0 = IS0[1:0] ei0 sensitivity
These bits define the interrupt sensitivity for ei0
according to Table 11.
Notes:
1. These 8 bits can be written only when the I bit in
the CC register is set.
2. Changing the sensitivity of a particular external
interrupt clears this pending interrupt. This can be
used to clear unwanted pending interrupts. Refer
to section “External interrupt function” on page 47.
3. Whatever the sensitivity configuration , ei2 can-
not exit the MCU from HALT, ACTIVE-HALT and
AWUFH modes when a falling edge occurs.
Table 11. Interrupt Sensitivity Bits
ISx1 ISx0
00
01
10
11
External Interrupt Sensitivity
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
Bits 1:0 = IS3[1:0] ei3 sensitivity
These bits define the interrupt sensitivity for ei0
according to Table 11.
Notes:
1. These 8 bits can be written only when the I bit in
the CC register is set.
2. Changing the sensitivity of a particular external
interrupt clears this pending interrupt. This can be
used to clear unwanted pending interrupts. Refer
to section “External interrupt function” on page 47.
3. IS4[1:0] = 01 is the only safe configuration to
avoid spurious interrupt in HALT and AWUFH
modes.
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