DSPIC33FJ32GP302T-I/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ32GP302T-I/SO Datasheet PDF : 402 Pages
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 7-13: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
U-0
—
RTCIE
DMA5IE
DCIIE
DCIEIE
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-0
Unimplemented: Read as ‘0’
RTCIE: Real-Time Clock and Calendar Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIIE: DCI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIEIE: DCI Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
2009 Microchip Technology Inc.
Preliminary
DS70292D-page 109
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