LTM4630IV View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTM4630IV

Dual 18A or Single 36A DC/DC µModule Regulator

Linear Technology 

LTM4630

APPLICATIONS INFORMATION

applied. Figure 5 shows a graph of frequency setting

verses programming voltage. An external clock can be

applied to the MODE_PLLIN pin from 0V to INTVCC over

a frequency range of 400kHz to 780kHz. The clock input

high threshold is 1.6V and the clock input low threshold

is 1V. The LTM4630 has the PLL loop filter components

on board. The frequency setting resistor should always

be present to set the initial switching frequency before

locking to an external clock. Both regulators will operate

in continuous mode while being externally clock.

The output of the PLL phase detector has a pair of comple-

mentary current sources that charge and discharge the

internal filter network. When the external clock is applied

then the fSET frequency resistor is disconnected with

an internal switch, and the current sources control the

frequency adjustment to lock to the incoming external

clock. When no external clock is applied, then the internal

switch is on, thus connecting the external fSET frequency

set resistor for free run operation.

900

800

700

600

500

400

300

200

100

0

0

0.5

1

1.5

2

fSET PIN VOLTAGE (V)

2.5

4630 F05

Figure 5. Operating Frequency vs fSET Pin Voltage

Minimum On-Time

Minimum on-time tON is the smallest time duration that

the LTM4630 is capable of turning on the top MOSFET on

either channel. It is determined by internal timing delays,

and the gate charge required turning on the top MOSFET.

Low duty cycle applications may approach this minimum

on-time limit and care should be taken to ensure that:

VOUT

VIN • FREQ

>

tON(MIN)

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the output ripple and current will increase. The on-time

can be increased by lowering the switching frequency. A

good rule of thumb is to keep on-time longer than 110ns.

Output Voltage Tracking

Output voltage tracking can be programmed externally

using the TRACK pins. The output can be tracked up and

down with another regulator. The master regulator’s output

is divided down with an external resistor divider that is the

same as the slave regulator’s feedback divider to imple-

ment coincident tracking. The LTM4630 uses an accurate

60.4k resistor internally for the top feedback resistor for

each channel. Figure 6 shows an example of coincident

tracking. Equations:

SLAVE

=

1+



60.4k

RTA







•

VTRACK

VTRACK is the track ramp applied to the slave’s track pin.

VTRACK has a control range of 0V to 0.6V, or the internal

reference voltage. When the master’s output is divided

down with the same resistor values used to set the slave’s

output, then the slave will coincident track with the master

until it reaches its final value. The master will continue to

its final value from the slave’s regulation point. Voltage

tracking is disabled when VTRACK is more than 0.6V. RTA

in Figure 6 will be equal to the RFB for coincident tracking.

Figure 7 shows the coincident tracking waveforms.

The TRACK pin of the master can be controlled by a

capacitor placed on the master regulator TRACK pin to

ground. A 1.3µA current source will charge the TRACK

pin up to the reference voltage and then proceed up

For more information www.linear.com/LTM4630

4630fa

15

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