ST72334J4TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72334J4TC

8-bit MCU for automotive with single voltage Flash/ROM memory, ADC, 16-bit timers, SPI, SCI interfaces

STMicroelectronics 

ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto

15.4 SUPPLY CURRENT CHARACTERISTICS

The following current consumption specified for

the ST7 functional operating modes over tempera-

ture range does not take into account the clock

source current consumption. To get the total de-

vice consumption, the two current values must be

added (except for Halt mode for which the clock is

stopped).

Symbol

Parameter

∆IDD(∆Ta) Supply current variation vs. temperature

Conditions

Constant VDD and fCPU

Max Unit

10

%

15.4.1 Run and Slow Modes

Symbol

Parameter

Supply current in Run mode 3)

(see Figure 62)

Supply current in Slow mode 4)

(see Figure 63)

IDD

Supply current in Run mode 3)

(see Figure 62)

Supply current in Slow mode 4)

(see Figure 63)

Conditions

fOSC=2MHz, fCPU=1MHz

fOSC=4MHz, fCPU=2MHz

fOSC=8MHz, fCPU=4MHz

fOSC=16MHz, fCPU=8MHz

fOSC=2MHz, fCPU=62.5kHz

fOSC=4MHz, fCPU=125kHz

fOSC=8MHz, fCPU=250kHz

fOSC=16MHz, fCPU=500kHz

fOSC=2MHz, fCPU=1MHz

fOSC=4MHz, fCPU=2MHz

fOSC=8MHz, fCPU=4MHz

fOSC=16MHz, fCPU=8MHz

fOSC=2MHz, fCPU=62.5kHz

fOSC=4MHz, fCPU=125kHz

fOSC=8MHz, fCPU=250kHz

fOSC=16MHz, fCPU=500kHz

Typ 1) Max 2) Unit

1.2

1.8

2.1

3.5

3.9

7.0

7.4 14.0

0.4

0.9

0.5

1.1

0.7

1.4

1.0

2.0

mA

0.3

1

0.8

1.5

1.6

3

3.5

7

0.1

0.3

0.2

0.5

0.3

0.6

0.5

1.0

Figure 62. Typical IDD in RUN vs. fCPU

Figure 63. Typical IDD in SLOW vs. fCPU

IDD [mA]

8

7

6

8MHz

4MHz

5

2MHz

1MHz

IDD [mA]

1.2

1

0.8

500kHz

250kHz

125kHz

62.5kHz

4

0.6

3

0.4

2

0.2

1

0

3.2

3.5

4

4.5

5

5.5

0

3.2 3.5

4

4.5

5

5.5

VDD [V]

VDD [V]

Notes:

1. Typical data is based on TA=25°C, VDD=5V (4.5V≤VDD≤5.5V range) and VDD=3.4V (3.2V≤VDD≤3.6V range).

2. Data based on characterization results, tested in production at VDD max. and fCPU max.

3. CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals

in reset state; clock input (OSC1) driven by external square wave, CSS and LVD disabled.

4. Slow mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at VDD or VSS

(no load), all peripherals in reset state; clock input (OSC1) driven by external square wave, CSS and LVD disabled.

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